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Texas Instruments /MSP432P4111 /FLCTL_A /FLCTL_RDBRST_CTLSTAT

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Interpret as FLCTL_RDBRST_CTLSTAT

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (START)START 0 (MEM_TYPE_0)MEM_TYPE 0 (STOP_FAIL)STOP_FAIL 0 (DATA_CMP_0)DATA_CMP 0 (TEST_EN)TEST_EN 0 (BRST_STAT_0)BRST_STAT 0 (CMP_ERR)CMP_ERR 0 (ADDR_ERR)ADDR_ERR 0 (CLR_STAT)CLR_STAT

BRST_STAT=BRST_STAT_0, DATA_CMP=DATA_CMP_0, MEM_TYPE=MEM_TYPE_0

Description

Read Burst/Compare Control and Status Register

Fields

START

Start of burst/compare operation
MEM_TYPE

Type of memory that burst is carried out on

0 (MEM_TYPE_0): Main Memory

1 (MEM_TYPE_1): Information Memory

3 (MEM_TYPE_3): Engineering Memory
STOP_FAIL

Terminate burst/compare operation
DATA_CMP

Data pattern used for comparison against memory read data

0 (DATA_CMP_0): 0000_0000_0000_0000_0000_0000_0000_0000

1 (DATA_CMP_1): FFFF_FFFF_FFFF_FFFF_FFFF_FFFF_FFFF_FFFF
TEST_EN

Enable comparison against test data compare registers
BRST_STAT

Status of Burst/Compare operation

0 (BRST_STAT_0): Idle

1 (BRST_STAT_1): Burst/Compare START bit written, but operation pending

2 (BRST_STAT_2): Burst/Compare in progress

3 (BRST_STAT_3): Burst complete (status of completed burst remains in this state unless explicitly cleared by SW)
CMP_ERR

Burst/Compare Operation encountered atleast one data
ADDR_ERR

Burst/Compare Operation was terminated due to access to
CLR_STAT

Clear status bits 19-16 of this register

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Register License

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data